DMS (Digital Mixed Signal) Verification Engineer

Primary Skills:
1) Experience working with SV RNM behavioural models
2) Experience with Cadence Incisive/Xcelium metric Driven verification tools (e.g. vManager/IMC, functional and code coverage, assertions etc)
3) Experience with GLS simulations from top level
4) Ability to independently analyze and debug issues

Responsibilities:
1) Development of testcases utilizing constrained-random stimulus, assertions, and other checkers in SV-UVM digital mixed signal flow
2) Execution to plan and regression management
3) Code functional coverage and support code coverage closure
4) Support GLS simulations
5) File and track bugs to closure in Jira
6) Interact with designers/other groups throughout the phase of verification
7) Document results of assigned blocks and participate in reviews

Education: BE/B.Tech (ECE, EEE)

Experience: 6+ Years experience in writing constrained random tests in SV UVM flow

Work location: Bangalore

Interview Mode: F2F

Work Model: Work from office

Desired start date: Immediate

Posted date: 16-07-2024