Trainee Firmware Engineer / Firmware Engineer

Eligibility Criteria:
1) Masters or Bachelors of Engineering in ECE only (Full Time).
2) Minimum Aggregate: 60% throughout (10, +2 & BE/BTech/ME/MTech) (We do not encourage any current backlogs).
3) AMCAT (or similar) assessment, would be an added advantage.

Key Skills:
Primary Skills:
1) Design / development / verification & validation of RTL or IP cores for FPGA based embedded systems.
2) Experience on FPGA based embedded system based on Xilinx/Altera/Actel etc.
3) RTL Design, experience in VHDL, Verilog HDL coding.
4) Ability of Logic synthesis and verification is an added advantage.
Secondary Skills:
1) Vivado/Libero design suite, Mentor Graphics/Aldec V&V tools.
2) Ability to write test benches for FPGA based design validation.

Selection Process:
1) Round 1: Aptitude and C written test
2) Round 2: Technical assessment
3) Round 3: Final

Job Location:
Primary Location: Bengaluru (Work from Office)

All applications will be reviewed and the shortlisted applicants will be notified for further evaluation and interviews.
We appreciate your interest in Oak Systems. We look forward to receiving your application and getting to know you better.